More specifically it is the inadvertent creation of a lowimpedance path between the. Analysis of the latchup process and current filamentation in. Robust design with major power discrete technologies. Isolated igbt driver modules the isolated igbt driver modules made by i. The pwm source outputs a low signal to the inverter, which turns on the mosfet. They can accept, without damage or logic upset, more than 1500 ma of reverse current of either polarity being forced back into their outputs. Sunde faculty of electrical engineering and computing unska 3, hr0 zagreb, croatia fax. Igbt fwdpower bridges and fully integrated gate drivers with driving and monitoring functions replacing conventional hybrid igbt drivers are restricted to low power applications 600v, 1200v. This application note explains how this occurs and what can be done to prevent it.
Hefners model is fairly complex that has shown very good results. An8102 recommendations to avoid short pulse width issues. Hvic gate driver ic uses bootstrap method to control mosfet and igbt. By acting as a perfect interface between the controller ic and the load switch, this highgain, highspeed gate driver can handle peak currents up to 10a without requiring additionally circuitry. Latch up effects, turnon of a bipolar pnp transistor, are suppressed by the high vbe due to vbi of sic pn junctions required to activate a parasitic bipolar transistor and by the. The igbt would be destroyed unless the current is externally forced off. Vla53601r nxseries dual igbt gate driver interface board. In this sense, the non latch up igbt proposed by hans w. Consider the igbt embedded in a stepdown converter circuit.
They are not subject to damage when up to 5v of noise spiking of either polarity occurs on the ground pin. This lecture belongs to the subject edc electronics devices and circuits and the 7th module mosfet. Simply defined, latchup is a functional chip failure associated with excessive current going through the chip, caused by weak circuit design. Igbt gate driver solutions for low and medium power applications 18 igbt drivers.
To develop the medium power market for currents up to 100a or even higher the extension of the gate driver ic performance is necessary. With this training, you will learn how to calculate a gate resistance value for an igbt application, how to identify suitable gate driver ics based on peak current and power dissipation requirements, and how to finetune the gate resistance value in laboratory environment based on worst case conditions. Only cessation of the power supply can stop the latch up condition. Pdf dynamic avalanche behavior of power mosfets and. When igbt is turned off, the mosfet portion of the device turns off quite rapidly, and the portion of the total device current. As we shall see later, this is the real test of a driver how fast it can charge c gdh in addition to c gs. Insulated gate bipolar transistors have gained leading position in aerospace and marine applications. Galvanic isolation is provided by power integrations innovative solid insulator fluxlink technology.
Jan 19, 2015 for the circuit to latch up, several conditions must be met1. It supports most of the voltage and allows the mosfet to be a low voltage type and consequently have a low rdson value. Catastrophic failure and fault9tolerant design of igbt power. With a range spanning from single to halfbridge and multiplechannel drivers rated for either low or highvoltage up to 1500 v applications, st also offers galvanicallyisolated gate driver ics for safety and functional requirements, systeminpackage sip solutions integrating high and lowside gate drivers and mosfetbased power stages. In some cases latchup can be a temporary condition that can be resolved by power cycle, but unfortunate. Nanoseconds switching time monitoring of insulated gate. For shutting down an igbt when an overcurrent condition is detected, a soft turnoff is. Further, if a few simple precautions are taken at the design stage, then latch up can be completely avoided. The first circuit shows an nchannel power mosfet driving a wide. Robust design with major power discrete technologiesgtomasello. A product line of diodes incorporated zxgd3005e6 advance information 25v 10a gate driver in sot26 description and applications the zxgd3005e6 is a highspeed noninverting single gate driver capable of driving up to 10a into a mosfet or igbt gate capacitive load from supply voltages up to 25v.
Products of non latch up igbts were first commercialized by toshiba in 1985. How the igbt insulated gate bipolar transistor latch up. But this will increase the size of the device so fabs give a minimum space to put a tap, for example, 10. At that time, the latch up becomes selfsustaining, a positive feedback loop has been formed. Soi silicon on insulatordoesnt have any latch up problem. Latchup is a condition where the collector current can no. The drivers operate in a masterslave configuraion that allows the safe operation of parallelconnected igbt modules. Latchup is the low resistance connection between tub clarification needed and power supply rails. Turnoff time as a precursor for gate bipolar transistor. Failure mechanisms of insulated gate bipolar transistors. Power electronics systems are commonly used in motor drive, power supply and power conversion. The up to 8 a peak output drive current enables the product to drive devices up to 600 a without requiring any additional active components.
Under this forwardbiased condition, a high density of minority carrier holes is. Limits arising from a minority carrier dynamics which is known from an igbt, e. Igbt gate driver reference design for parallel igbts with. The collector current at which latchup occurs is called the latching current. Differences between datasheet test conditions and the application. Application note an983 igbt characteristics table of contents. An763 latchup protection for mosfet drivers application.
This is done by controlling the resistances of the buffer n region and the p base. Wachutka 1 1 institute for physics of electrotechnology, munich university of technology. Here we are going to study latch up condition in mosfet. Igbts have a higher gain than do mosfets, resulting in more shortcircuit current for a given gate voltage. Also to avoid the latch, a separate tap connection is put for each transistor. A systematic methodology is developed in order to clarify the punch through trench insulated gate bipolar transistor tigbt failure mechanisms which can occur under extreme operating conditions such as short circuit and clamped inductive switching. Opencircuit can also be due to absence of gate drive signal. A critical design parameter in the gate drive stage is the latch up immunity from reverse current due to displacement current feedback from the igbt output stage. A power cycle is required to correct this situation.
Jun 14, 2018 the insulating material is typically made infineon igbt gate solid polymers which have issues with degradation. In addition, you can enable fault latch circuitry which automatically shuts down the module and does not resume operation till power reset occurs. This kind of floating supply is suitable for providing gate drive circuitry to directly drive high. Igbt gate driver reference design for parallel igbts with shortcircuit protection and external bjt buffer 2 system design theory 2.
Basically sp ak ing, y lo r dtv cf b one of the many cmos processes available, can be made to latch up if stressed severely enough. Nxseries dual igbt gate driver interface board vla53601r 41 2 1 poerex, inc. Introduction in the last decade, industrial ac drives have become more advanced in performance and more compact in size. Insulated gate bipolar transistor igbt basics ixys corporation. In, the bond wire failures in igbt module are detected by utilizing the changes of turnon behavior. A single event latchup is a latchup caused by a single event upset.
Typical rise times would be about 30 nsec to 60 nsec. Is it possible to have latchup in a single mosfet package. The igbt can latch up if, while the fault current is still rising, the gate voltage is abruptly switched to zero before the collectoremitter voltage comes out of saturation. Although designed for driving discrete and module igbts, this device offers a. Gate driver boards for sic, mosfet and igbts taraz technologies. The magnitude of the collector current required to induce latch up reduces with increasing device temperature. Unfortunately, under dynamic conditions when the igbt is switching from on to off, it may latch up at drain current values less than the static current value.
The sid1183k is a single channel igbt and mosfet driver in an esop package. An763 latch up protection for mosfet drivers most cmos ics,given proper conditions,can latch,like an scr creating a short circuit from the positive supply voltage to ground. Latch up results from turning on of the parasitic pnpn thyristor. The modern igbt is latch up proof for all practical purprose. Operating principle of an igbt can be explained in terms of the schematic cell structure and equivalent circuit of fig 7. Drivers also provide higher power output, thus eliminating the need for multiple gate drivers in parallel igbt application. Msan107 understanding and eliminating latchup in cmos. A latch up is a type of short circuit which can occur in an integrated circuit ic. Insulated gate bipolar transistors igbts are a difficult problem for tcad engineers.
Cmos circuitry without major concern about latchup. Can someone help us with latching issues when driving igbts. A step by step methodology to analyze the igbt failure. No formula was provided for igbt, therefore a mosfet and bipolar junction transistor bjt was modeled in series to represent an igbt. They will not latch up under any conditions within their power and voltage ratings. Insulated gate bipolar transistor igbt basics abdus sattar, ixys corporation 1. All the explanation images have 2 mosfets next to each other and the latchup comes from their interaction through the substrate. Analog devices small form factor isolated gate drivers are designed for the higher switching speeds and system size constraints required by power switch technologies such as sic silicon carbide and gan gallium nitride, while still providing reliable control over switching characteristics for igbt insulated gate bipolar transistor and mosfet. This invention realized complete suppression of the parasitic thyristor action, for the first time, because the maximal collector current was limited infineon igbt gate the saturation current and never exceeded the latch up current. However, when properly applied, cmos devices are quite insensitive to actual conditions that exist in most systems. This document describes and discusses the topic of cmos latchup ranging from. Fuji primepacktm igbt driver compatibility igbt voltage igbt current est. Dynamic avalanche behavior of power mosfets and igbts under unclamped inductive switching conditions. Also power mosfets and new semiconductor devices like igbts with.
Failure rate is calculated by multiplying a base failure rate with several conditional factors. High current gate driver minimizes switching losses. Igbt gate driver solutions for low and medium power. Working and operation npnp structure thyristor parasitic transistor and resistence no effect under normal operation max collector current parasitic transistor activates thus parasitic thyristor activates latch up condition dominates i. This is largely due to the rapid development of power silicon. The magnitude of the collector current required to induce latchup reduces with increasing device temperature. By considering a 2d dimensional physically based device simulation, and by analyzing. The series resistance of the gate drive circuit limits this current. For gate drive requirements that exceed the standalone capability of the. Analysis of the latchup process and current filamentation. A latch up free condition based on these resistances is presented. The igbt is characterized by its ability to simultaneously handle a high voltage and a large current. Latchup is a failure mode where the igbt can no longer be turned off by the gate. More specifically it is the inadvertent creation of a lowimpedance path between the power supply rails of a mosfet circuit.
The three main operating conditions that would subject an igbt to this com. The semiconductor structure of bipolar transistors can cause failures by second breakdown. The jfet represents the constriction of current between any two neighboring igbt cells. The physical operation of these devices combines both that of a cmos mosfet and that of a bipolar transistor. If the parasitic trace resistance r1 is large enough, the ground of the inverter can be at a higher potential than the input signal. When the mosfet turns on, current in the source lead builds up very rapidly. Second breakdown and latchup behavior of igbts iet. The following diagram is a drawing of a typical cmos circuit. Temperature effects external and internal to the product can also influence the latch up immunity of products. More specifically it is the inadvertent creation of a lowimpedance path between the power supply rails of a mosfet circuit, triggering a parasitic structure which disrupts proper functioning of the part, possibly even leading to its destruction due to overcurrent. Figure 6 shows the gate drive waveform driving the 1200v irgph50kd2 copack igbt for the inverter stage of a 3hp motor.
An igbt is more prone to latch up because it has a fourlayer structure, and this may also restrict the device safe operating area. From the input side the igbt behaves essentially as a mosfet. Latch up v ceon open circuit bond wire high temperature, high. Non latch up igbt operation was ensured, for the first time, for the entire device operation range.
A circuit symbol for the igbt is shown in figure 3. For our example, assume that the mosfet is switching 5a and the circuit inductance is 10 nh. Online condition monitoring of igbt modules using current. Watts channel fuji part number agileswitch part number 20 pin concept compatible agileswitch part number 30 pin. Similarly, igbt power density is greater during a shortcircuit fault. The zxgd3005e6 provides a cost effective solution to the problem of switching power mosfets and igbts. When the same set up is tested on a resistive load no latch up is noticed. Referring to figure 3, assume r1 is replaced by an inductor. Transistor spacing can create conditions for latchup. Turnoff time as a precursor for gate bipolar transistor latchup. The master 1sp0635v or 1sp0635s can be used as a standalone driver without slave to drive a single igbt module or it can be used with up to three slaves 1sp0635d to drive up to four parallelconnected igbt modules. Our integrated circuits, igbt drivers, and diodes enable compact, energyefficient acdc power supplies for a vast range of electronic products including mobile devices, tvs, pcs, appliances, led lights, smart utility meters, traction motors, dc.
Vla53601r is a completely populated gate driver board designed specifically for driving nx package style powerex igbt modules rated up to 600a at 1200v. Advanced soi gate driver ic with integrated v monitoring. Low driving power and a simple drive circuit due to the input mos gate structure. At that point, the igbt current is no longer controlled by the mos gate. A similar condition can be caused by circuit inductance. The collector current at which latch up occurs is called the latching current. Igbt will remain on cannot controlled by gate voltage. Infineon igbt gate driver for windows however, it was demonstrated by baliga and also by a.
Mc33153 single igbt gate driver the mc33153 is specifically designed as an igbt driver for high power applications that include ac induction motor control, brushless dc motor control and uninterruptable power supplies. However, due to the fact that the power devices are exposed to electrical, thermal and mechanical stresses, the failure rates of these components are comparatively high, and it was found to be the main reason for reducing the reliability of the whole system. As shown in the crosssection of figure 1, the igbt is made of four alternate pnpn layers. Starters, read the data sheet on the driver it says on page 3 that the latch up protection withstand reverse current is typically greater than 0. Latchup protection for mosfet drivers microchip technology. Jan 08, 2014 working and operation npnp structure thyristor parasitic transistor and resistence no effect under normal operation max collector current parasitic transistor activates thus parasitic thyristor activates latch up condition dominates i.
In some cases latch up can be a temporary condition that can be resolved by power cycle, but unfortunately it can also cause a fatal chip failure. Design of igbts for latchup free operation sciencedirect. Fault detection and prognostics of insulated gate bipolar transistor igbt using knearest neighbor classification algoritihm, m. By adding a bootstrap circuit outside the hvic, the high side can be supplied with a signal power source. Failure mechanisms of insulated gate bipolar transistors igbts. Igbt drivers are among the most efficient in the industry, which is critical in the use of igbts in renewable energy applications such as solar inverters, wind turbines, hybrid electric vehicles, motor drives, etc. Currently six types of igbt driver modules are available to our customers. Driving highly inductive loads destroys mosfet driver. Understanding a few facts will resolve both of these situations. How advanced igbt gate drivers simplify highvoltage.
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